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? semiconductor components industries, llc, 2010 september, 2010 ? rev. 18 1 publication order number: ncv8664/d ncv8664 very low i q low dropout linear regulator the ncv8664 is a precision 3.3 v and 5.0 v fixed output, low dropout integrated voltage regulator with an output current capability of 150 ma. careful management of light load current consumption, combined with a low leakage process, achieve a typical quiescent current of 22 a. ncv8664 is pin and functionally compatible with ncv4264 and ncv4264 ? 2, and it could replace these parts when very low quiescent current is required. the output voltage is accurate within 2.0%, and maximum dropout voltage is 600 mv at full rated load current. it is internally protected against input supply reversal, output overcurrent faults, and excess die temperature. no external components are required to enable these features. features ? 3.3 v, 5.0 v fixed output ? 2.0% output accuracy, over full temperature range ? 30 a maximum quiescent current at i out = 100 a ? 600 mv maximum dropout voltage at 150 ma load current ? wide input voltage operating range of 4.5 v to 45 v ? internal fault protection ? ? 42 v reverse voltage ? short circuit/overcurrent ? thermal overload ? ncv prefix for automotive and other applications requiring site and control changes ? aec ? q100 qualified ? emc compliant ? these are pb ? free devices sot ? 223 st suffix case 318e pin connections http://onsemi.com marking diagrams xx = voltage rating dpak (50 = 5.0 v v ersion) (33 = 3.3 v v ersion) x = voltage rating sot223 (5 = 5.0 v version) (3 = 3.3 v version) a = assembly location l = wafer lot y = year w, ww = work week or g = pb ? free package see detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet. ordering information 1 2 3 tab 1 2 3 4 v664xxg alyww dpak dt suffix case 369c (sot ? 223/dpak) pin function 1v in 2,tab gnd 3v out 1 1 ayw v664x (note: microdot may be in either location) 1 8 soic ? 8 fused case 751 v664x alywx 1 8 (soic ? 8 fused) pin function 1nc 2, v in 3 gnd 4. v out 5 ? 8. nc
ncv8664 http://onsemi.com 2 in bias current generators 1.3 v reference + - error amp thermal shutdown out gnd figure 1. block diagram pin function description pin no. symbol function dpak/sot ? 223 soic ? 8 1 2 v in unregulated input voltage; 4.5 v to 45 v. 2 3 gnd ground; substrate. 3 4 v out regulated output voltage; collector of the internal pnp pass transistor. tab ? gnd ground; substrate and best thermal connection to the die. ? 1, 5 ? 8 nc no connection. operating range pin symbol, parameter symbol min max unit v in , dc input operating v oltage v in 4.5 +45 v junction temperature operating range t j ? 40 +150 c maximum ratings rating symbol min max unit v in , dc voltage v in ? 42 +45 v v out , dc voltage v out ? 0.3 +18 v storage t emperature t stg ? 55 +150 c esd capability, human body model (note 1) v esdhb 4000 ? v esd capability, machine model (note 1) v esdmim 200 ? v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. this device series incorporates esd protection and is tested by the following methods: esd hbm tested per aec ? q100 ? 002 (eia/jesd22 ? a 114c) esd mm tested per aec ? q100 ? 003 (eia/jesd22 ? a 115c) thermal resistance parameter symbol condition min max unit junction ? to ? ambient dpak sot ? 223 soic ? 8 fused r ja ? ? ? 101 (note 2) 99 (note 2) 145 c/w junction ? to ? case dpak sot ? 223 soic ? 8 fused r jc ? ? ? 9.0 17 ? c/w 2. 1 oz., 100 mm 2 copper area.
ncv8664 http://onsemi.com 3 lead soldering temperature and msl rating symbol min max unit lead t emperature soldering reflow (smd styles only), lead free (note 3) t sld ? 265 pk c moisture sensitivity level sot223 dpak soic ? 8 fused msl 3 2 1 ? ? ? ? 3. lead free, 60 sec ? 150 sec above 217 c, 40 sec max at peak. electrical characteristics (v in = 13.5 v, tj = ? 40 c to +150 c, unless otherwise noted.) characteristic symbol test conditions min typ max unit output v oltage 5.0 v version v out 0.1 ma i out 150 ma (note 4) 6.0 v v in 28 v 4.900 5.000 5.100 v output v oltage 5.0 v version v out 0 ma i out 150 ma 5.5 v v in 28 v ? 40 c t j 125 c 4.900 5.000 5.100 v output voltage 3.3 v version v out 0.1 ma i out 150 ma (note 4) 4.5 v v in 28 v 3.234 3.300 3.366 v line regulation 5.0 v version v out vs. v in i out = 5.0 ma 6.0 v v in 28 v ? 25 5.0 +25 mv line regulation 3.3 v version v out vs. v in i out = 5.0 ma 4.5 v v in 28 v ? 25 5.0 +25 mv load regulation v out vs. i out 1.0 ma i out 150 ma (note 4) ? 35 5.0 +35 mv dropout v oltage 5.0 v version v in ? v out i q = 100 ma (notes 4 & 5) i q = 150 ma (notes 4 & 5) ? ? 265 315 500 600 mv dropout v oltage 3.3 v version v in ? v out i q = 100 ma (notes 4 & 7) i q = 150 ma (notes 4 & 7) ? ? ? ? 1.266 1.266 v quiescent current i q i out = 100 a t j = 25 c t j = ? 40 c to +85 c ? ? 21 22 29 30 a active ground current i g(on) i out = 50 ma (note 4) i out = 150 ma (note 4) ? ? 1.3 8.0 3 15 ma power supply rejection psrr v ripple = 0.5 v p ? p , f = 100 hz ? 67 ? db output capacitor for stability 5.0 v version c out esr i out = 0.1 ma to 150 ma (note 4) 10 ? ? ? ? 9.0 f output capacitor for stability 3.3 v version c out esr i out = 0.1 ma to 150 ma (note 4) 22 ? ? ? ? 18 f protection current limit i out(lim) v out = 4.5 v (5.0 v version) (note 4) v out = 3.0 v (3.3 v version) (note 4) 150 150 ? ? 500 500 ma short circuit current limit i out(sc) v out = 0 v (note 4) 100 ? 500 ma thermal shutdown threshold t tsd (note 6) 150 ? 200 c 4. use pulse loading to limit power dissipation. 5. dropout voltage = (v in ? v out ), measured when the output voltage has dropped 100 mv relative to the nominal value obtained with v in = 13.5 v. 6. not tested in production. limits are guaranteed by design. 7. v do = v in ? v out . for output voltage set to < 4.5 v, v do will be constrained by the minimum input voltage.
ncv8664 http://onsemi.com 4 8664 13 2 v out c out 10 f, 5.0 v version 22 f, 3.3 v version c in 1.0 f gnd 4.5 ? 45 v input figure 2. measurement circuit figure 3. applications circuit 8664 13 2 v out c out 10 f, 5.0 v version 22 f, 3.3 v version output c in 100 nf gnd 4.5 ? 45 v input r l output v in v in 100 nf i q i i
ncv8664 http://onsemi.com 5 typical curves i out = 100 ma ? 40 c 125 c 25 c figure 4. esr characterization, 5.0 v version figure 5. output v oltage vs. input voltage, 5.0 v version load current (ma) input voltage (v) 140 120 100 80 60 40 20 0 0.01 10 100 1000 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 0 1.0 2.0 3.0 4.0 5.0 6.0 figure 6. current consumption vs. output load, 5.0 v version output current (ma) 150 100 50 0 0 2.0 4.0 9.0 esr ( ) output voltage (v) quiescent current (ma) 180 160 maximum esr c out = 10, 22 f stable region v in = 13.5 v 6.0 8.0 7.0 200 8.0 figure 7. current consumption vs. output load (low load), 5.0 v version output current (ma) 15 10 5.0 0 0 0.05 0.10 0.15 0.30 0.35 0.40 quiescent current (ma) 0.25 20 ? 40 c 125 c 25 c 0.20 figure 8. quiescent current vs. temperature, 5.0 v version temperature ( c) 100 50 ? 50 0 5.0 15 45 quiescent current ( a) 20 30 35 figure 9. quiescent current vs. temperature, 5.0 v version temperature ( c) 50 0 ? 50 0 2.0 4.0 8.0 10 12 quiescent current (ma) 6.0 10 25 40 0 150 i out = 150 ma 100 150 v in = 13.5 v v in = 13.5 v v in = 13.5 v v in = 13.5 v i out = 100 a 1.0 3.0 5.0 1.0 0.1
ncv8664 http://onsemi.com 6 typical curves r l = 50 r l = 100 t a = 25 c t a = 125 c figure 10. dropout voltage vs. output load, 5.0 v version figure 11. current consumption vs. input voltage, 5.0 v version output load (ma) input voltage (v) 150 100 50 0 0 0.15 0.30 0.45 50 40 30 20 10 0 0 18 2.0 10 4.0 14 16 figure 12. output current vs. input voltage, 5.0 v version input voltage (v) 40 30 10 0 0 20 40 160 dropout (v) current consumption (ma) output current (ma) 200 125 c 60 80 100 50 figure 13. output v oltage vs. temperature, 5.0 v version temperature ( c) 100 50 0 ? 50 4.90 4.92 4.94 4.98 5.06 5.08 5.10 output voltage (v) 5.02 150 5.00 figure 14. current limit vs. temperature, 5.0 v version temperature ( c) 150 100 ? 50 0 50 100 400 output current (ma) 200 250 350 25 c ? 40 c 0.05 0.10 0.20 0.25 0.35 0.40 6.0 8.0 12 4.96 5.04 20 140 120 50 0 150 300 v in = 13.5 v v in = 13.5 v load = 10 ma
ncv8664 http://onsemi.com 7 typical curves i out = 100 ma i out = 150 ma ? 40 c 125 c 25 c figure 15. esr stability, 3.3 v version figure 16. output voltage vs. input voltage, 3.3 v version output load (ma) input voltage (v) 100 75 50 25 0 0 50 60 100 40 30 20 10 0 0 1.0 1.5 2.0 2.5 3.0 3.5 figure 17. current consumption vs. output load, 3.3 v version output load (ma) 150 100 50 0 0 2.0 4.0 9.0 esr ( ) output voltage (v) quiescent current (ma) 150 125 v in = 13.5 v c out > 22 f 6.0 8.0 7.0 200 figure 18. current consumption vs. output load (low load), 3.3 v version output load (ma) 20 15 10 0 0 0.05 0.10 0.15 0.35 0.45 0.50 quiescent current (ma) 0.30 25 0.25 temperature ( c) 110 60 ? 40 0 1 3 10 quiescent current ( a) 4 7 8 2 5 9 10 150 v in = 13.5 v 1.0 3.0 5.0 30 10 20 40 70 80 90 0.5 i out = 5 ma 0.20 6 v in = 13.5 v figure 19. quiescent current vs. temperature, 3.3 v version temperature ( c) 110 60 10 ? 40 0 5 10 15 35 45 quiescent current ( a) 30 150 25 v in = 13.5 v i out = 100 a 20 figure 20. quiescent current vs. temperature, 3.3 v version ? 40 c 125 c 25 c 5 0.40 v in = 13.5 v 40
ncv8664 http://onsemi.com 8 typical curves temperature ( c) temperature ( c) 60 20 0 ? 20 ? 40 3.00 3.25 3.30 3.50 150 110 60 10 ? 40 0 100 150 200 250 output voltage (v) current limit (ma) 125 100 v in = 14 v i out = 5 ma 3.15 3.05 3.10 3.20 3.35 3.40 3.45 50 v in = 13.5 v 40 80 input voltage (v) 50 30 20 10 0 0 2 4 6 7 current consumption (ma) 1 r l = 50 40 r l = 100 3 5 figure 21. dropout voltage, 3.3 v version output load (ma) 100 50 0 0 0.05 0.10 0.30 0.35 0.45 dropout voltage (v) 0.20 200 150 0.15 0.25 0.40 figure 22. current consumption vs. input voltage, 3.3 v version figure 23. output v oltage vs. temperature, 3.3 v version figure 24. short circuit current limit vs. temperature, 3.3 v version 120 ? 40 c 125 c 25 c
ncv8664 http://onsemi.com 9 circuit description the ncv8664 is a precision trimmed 3.3 v and 5.0 v fixed output regulator. careful management of light load consumption combined with a low leakage process results in a typical quiescent current of 22 a. the device has current capability of 150 ma, with 600 mv of dropout voltage at full rated load current. the regulation is provided by a pnp pass transistor controlled by an error amplifier with a bandgap reference. the regulator is protected by both current limit and short circuit protection. thermal shutdown occurs above 150 c to protect the ic during overloads and extreme ambient temperatures. regulator the error amplifier compares the reference voltage to a sample of the output voltage (v out ) and drives the base of a pnp series pass transistor by a buffer. the reference is a bandgap design to give it a temperature ? stable output. saturation control of the pnp is a function of the load current and input voltage. over saturation of the output power device is prevented, and quiescent current in the ground pin is minimized. the ncv8664 is equipped with foldback current protection. this protection is designed to reduce the current limit during an overcurrent situation. regulator stability considerations the input capacitor c in in figure 2 is necessary for compensating input line reactance. possible oscillations caused by input inductance and input capacitance can be damped by using a resistor of approximately 1 in series with c in . the output or compensation capacitor, c out helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. the capacitor value and type should be based on cost, availability, size and temperature constraints. tantalum, aluminum electrolytic, film, or ceramic capacitors are all acceptable solutions, however, attention must be paid to esr constraints. the aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures ( ? 25 c to ? 40 c), both the value and esr of the capacitor will vary considerably. the capacitor manufacturer?s data sheet usually provides this information. the value for the output capacitor c out shown in figure 2 should work for most applications; however, it is not necessarily the optimized solution. stability is guaranteed at values c out 10 f and esr 9 for 5.0 v version, and c out 22 f and esr 18 for 3.3 v version, within the operating temperature range. actual limits are shown in a graph in the typical performance characteristics section. calculating power dissipation in a single output linear regulator the maximum power dissipation for a single output regulator (figure 3) is: i q(max) v i(max) i q (eq. 1) p d(max) [v in(max) v out(min) ] where: v in(max) is the maximum input voltage, v out(min) is the minimum output voltage, i q(max) is the maximum output current for the application, and i q is the quiescent current the regulator consumes at i q(max) . once the value of p d(max) is known, the maximum permissible value of r ja can be calculated: p ja 150 o c t a p d (eq. 2) the value of r ja can then be compared with those in the package section of the data sheet. those packages with r ja ?s less than the calculated value in equation 2 will keep the die temperature below 150 c. in some cases, none of the packages will be sufficient to dissipate the heat generated by the ic, and an external heat sink will be required. the current flow and voltages are shown in the measurement circuit diagram. heat sinks for proper heat sinking of the soic ? 8 lead device, connect pins 5 ? 8 to the heat sink. a heat sink effectively increases the surface area of the package to improve the flow of heat away from the ic and into the surrounding air. each material in the heat flow path between the ic and the outside environment will have a thermal resistance. like series electrical resistances, these resistances are summed to determine the value of r ja : r ja r jc r cs r sa (eq. 3) where: r jc = the junction ? to ? case thermal resistance, r cs = the case ? to ? heat sink thermal resistance, and r sa = the heat sink ? to ? ambient thermal resistance. r ja appears in the package section of the data sheet. like r ja , it too is a function of package type. r cs and r sa are functions of the package type, heat sink and the interface between them. these values appear in data sheets of heat sink manufacturers. thermal, mounting, and heat sinking are discussed in the on semiconductor application note an1040/d, available on the on semiconductor website.
ncv8664 http://onsemi.com 10 emc ? characteristics: conducted susceptibility all emc ? characteristics are based on limited samples and not part of production testing, according to 47a/658/cd iec62132 ? 4 (direct power injection) test conditions supply voltage v in = 12 v temperature t a = 23 c 5 c load r l = 35 direct power injection: 33 dbm forward power cw acceptance criteria: amplitude dev. max 2% of output voltage figure 25. test circuit gnd v in v out ncv8664 u1 10 f 10 f ++ c4 c2 c1 47 nf c3 10 nf f2 ferrite f1 ferrite f3 ferrite x1 vin_hf x2 vin_mon x5 gnd_hf x6 gnd_mon x4 vout_mon x3 vout_hf 13 2 figure 26. typical v in ? pin susceptibility figure 27. typical v out ? pin susceptibility frequency (mhz) 1000 100 10 1 0 10 20 30 40 v in (dbm) frequency (mhz) 1000 100 10 1 0 10 20 30 40 v out (dbm) v out ? pin pass 33 dbm v in ? pin pass 33 dbm
ncv8664 http://onsemi.com 11 figure 28. ja vs. copper spreader area figure 29. single ? pulse heating curves copper area (mm 2 ) ja ( c/w) pulse time (sec) r(t) ( c/w) 0 100 200 300 400 500 600 700 0 20 40 60 80 100 120 140 160 sot223 dpak soic ? 8 fused 0.001 0.01 0.1 1 10 100 1000 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 soic ? 8 fused sot223 dpak ordering information device marking package shipping ? ncv8664d50r2g v6645 soic ? 8 fused (pb ? free) 2500 / tape & reel ncv8664d50g v6645 soic ? 8 fused (pb ? free) 98 units / rail ncv8664dt50rkg v66450g dpak (pb ? free) 2500 / tape & reel NCV8664DT33RKG v66433g dpak (pb ? free) 2500 / tape & reel ncv8664st50t3g v6645 sot ? 223 (pb ? free) 4000 / tape & reel ncv8664st33t3g v6643 sot ? 223 (pb ? free) 4000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd801 1/d.
ncv8664 http://onsemi.com 12 package dimensions sot ? 223 (to ? 261) case 318e ? 04 issue m a1 b1 d e b e e1 4 123 0.08 (0003) a l1 c notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 1.5 0.059 mm inches scale 6:1 3.8 0.15 2.0 0.079 6.3 0.248 2.3 0.091 2.3 0.091 2.0 0.079 soldering footprint h e dim a min nom max min millimeters 1.50 1.63 1.75 0.060 inches a1 0.02 0.06 0.10 0.001 b 0.60 0.75 0.89 0.024 b1 2.90 3.06 3.20 0.115 c 0.24 0.29 0.35 0.009 d 6.30 6.50 6.70 0.249 e 3.30 3.50 3.70 0.130 e 2.20 2.30 2.40 0.087 0.85 0.94 1.05 0.033 0.064 0.068 0.002 0.004 0.030 0.035 0.121 0.126 0.012 0.014 0.256 0.263 0.138 0.145 0.091 0.094 0.037 0.041 nom max l1 1.50 1.75 2.00 0.060 6.70 7.00 7.30 0.264 0.069 0.078 0.276 0.287 h e ? ? e1 0 1 0 0 1 0 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d.
ncv8664 http://onsemi.com 13 package dimensions dpak (single gauge) dt suffix case 369c ? 01 issue d b d e b3 l3 l4 b2 e m 0.005 (0.13) c c2 a c c z dim min max min max millimeters inches d 0.235 0.245 5.97 6.22 e 0.250 0.265 6.35 6.73 a 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.030 0.045 0.76 1.14 c 0.018 0.024 0.46 0.61 e 0.090 bsc 2.29 bsc b3 0.180 0.215 4.57 5.46 l4 ??? 0.040 ??? 1.01 l 0.055 0.070 1.40 1.78 l3 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. thermal pad contour optional within di- mensions b3, l3 and z. 4. dimensions d and e do not include mold flash, protrusions, or burrs. mold flash, protrusions, or gate burrs shall not exceed 0.006 inches per side. 5. dimensions d and e are determined at the outermost extremes of the plastic body. 6. datums a and b are determined at datum plane h. 12 3 4 5.80 0.228 2.58 0.102 1.60 0.063 6.20 0.244 3.00 0.118 6.17 0.243 mm inches scale 3:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d. soldering footprint* h 0.370 0.410 9.40 10.41 a1 0.000 0.005 0.00 0.13 l1 0.108 ref 2.74 ref l2 0.020 bsc 0.51 bsc a1 h detail a seating plane a b c l1 l h l2 gauge plane detail a rotated 90 cw
ncv8664 http://onsemi.com 14 package dimensions soic ? 8 nb case 751 ? 07 issue aj seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, in cluding without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different a pplications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical e xperts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc prod uct could create a s ituation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney f ees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was neglig ent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 ncv8664/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loca sales representative

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